F. KELEŞ, "Pattern Recognition Using N- Input Neuron Circuits Based on Floating Gate MOS Transistors," International IEEE Region 8 Conference EUROCON 2009 , 2009
KELEŞ, F. 2009. Pattern Recognition Using N- Input Neuron Circuits Based on Floating Gate MOS Transistors. International IEEE Region 8 Conference EUROCON 2009 .
KELEŞ, F., (2009). Pattern Recognition Using N- Input Neuron Circuits Based on Floating Gate MOS Transistors . International IEEE Region 8 Conference EUROCON 2009
KELEŞ, Fatih. "Pattern Recognition Using N- Input Neuron Circuits Based on Floating Gate MOS Transistors," International IEEE Region 8 Conference EUROCON 2009, 2009
KELEŞ, Fatih. "Pattern Recognition Using N- Input Neuron Circuits Based on Floating Gate MOS Transistors." International IEEE Region 8 Conference EUROCON 2009 , 2009
KELEŞ, F. (2009) . "Pattern Recognition Using N- Input Neuron Circuits Based on Floating Gate MOS Transistors." International IEEE Region 8 Conference EUROCON 2009 .
@conferencepaper{conferencepaper, author={Fatih KELEŞ}, title={Pattern Recognition Using N- Input Neuron Circuits Based on Floating Gate MOS Transistors}, congress name={International IEEE Region 8 Conference EUROCON 2009}, city={}, country={}, year={2009}}