KARABİBER, F. Et Al. 2008. An efficient memory allocation algorithm and hardware design with VHDL synthesis. INTERNATIONAL JOURNAL OF ELECTRONICS , vol.95, no.2 , 125-138.

KARABİBER, F., Sertbas, A., Ozdemir, S., & Cam, H., (2008). An efficient memory allocation algorithm and hardware design with VHDL synthesis. INTERNATIONAL JOURNAL OF ELECTRONICS , vol.95, no.2, 125-138.

KARABİBER, Fethullah Et Al. "An efficient memory allocation algorithm and hardware design with VHDL synthesis," INTERNATIONAL JOURNAL OF ELECTRONICS , vol.95, no.2, 125-138, 2008

KARABİBER, Fethullah Et Al. "An efficient memory allocation algorithm and hardware design with VHDL synthesis." INTERNATIONAL JOURNAL OF ELECTRONICS , vol.95, no.2, pp.125-138, 2008

KARABİBER, F. Et Al. (2008) . "An efficient memory allocation algorithm and hardware design with VHDL synthesis." INTERNATIONAL JOURNAL OF ELECTRONICS , vol.95, no.2, pp.125-138.

@article{article, author={Fethullah KARABİBER Et Al. }, title={An efficient memory allocation algorithm and hardware design with VHDL synthesis}, journal={INTERNATIONAL JOURNAL OF ELECTRONICS}, year=2008, pages={125-138} }