Dielectric Response and Capacitance Measurements of Ag/ PVAc-Si /p-Si Structure


Süngü Mısırlıoğlu B. , Gülşen D., Kuruoğlu F., Çalışkan M. , Saraç Özkan A. , Serin M.

Silicon, vol.1, no.1, pp.1-11, 2022 (Journal Indexed in SCI) identifier identifier

  • Publication Type: Article / Article
  • Volume: 1 Issue: 1
  • Publication Date: 2022
  • Doi Number: 10.1007/s12633-022-01758-9
  • Journal Name: Silicon
  • Journal Indexes: Science Citation Index Expanded, Scopus, Compendex, INSPEC
  • Page Numbers: pp.1-11
  • Keywords: AC conductivity, Dielectric parameters, Impedance spectroscopy, MIS, Poly(vinyl acetate) latex, Silicone surfactant, IMPEDANCE SPECTROSCOPY, ELECTRICAL-PROPERTIES, FREQUENCY, RELAXATION, TEMPERATURE, MECHANISM, POLYMER, ACETATE

Abstract

In this study, the effect of Poly(vinyl acetate) latex with Silicone surfactant (shortly PVAc-Si) thin film on the dielectric and capacitance-voltage properties of Ag / PVAc-Si /p-Si (MIS) structure were investigated. The dielectric characterization was obtained by impedance spectroscopy technique between 40 Hz-110 MHz at room temperature. The capacitance-voltage measurements were performed to clarify the flat band voltage of the sample. The frequency dependence of the real and imaginary parts of the complex impedance function indicated a space charge polarization. The Nyquist plots confirmed a single Debye type relaxation. The real and imaginary components of the complex dielectric function implied the effect of the grain and grain boundary effects in the material. Alternative current (ac) conductivity versus frequency curve of the structures displayed two different conductivity regimes. Nearly dc conductivity for the low frequencies and the dispersive region of the high-frequency band was obtained. The increase in ac conductivity with increasing frequency has been explained in the context of the Quantum Mechanical Tunneling (QMT) mechanism for PVAc-Si film-induced devices. According to the capacitance-voltage measurement, it is also shown that there is a hysteresis for flat band capacitance in between the applied forward and reverse voltage. Reduction of this hysteresis is achieved by the applied voltage across terminals of the PVAc-Si film-induced MIS structure. This controllable reduction in hysteresis may find a place in an application for floating gate memory devices. This study also provides to understand the effect of insulator layer thickness on the dielectric behavior of MIS devices.