In this work, intelligent algorithms designed on embedded hardware for signature recognition is presented. Feed forward Conic Section Function Neural Network (CSFNN) and Differential Evaluation Algorithm (DEA) are implemented on the Field Programmable Gate Arrays (FPGAs). Unified robust classifier CSFNN is applied on the preprocessed signatures for recognition purpose. DEA is used for training CSFNN in order to overcome local minimum problems. The implemented CSFNN on FPGA has the characteristics of flexible adaptable size providing various datasets. The CSFNN implementation on FPGA is realized using the 16-bit floating point arithmetic IEEE 754-2008 standard. The proposed on-chip CSFNN based signature recognition system described in VHDL has been implemented and evaluated on a high-end Virtex 7 - VC707 platform. The intelligent system embedded on FPGA is approximately 10(5) times faster than its equivalent software implementation.